Queue manager for a buffer

G - Physics – 06 – F

Patent

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G06F 5/06 (2006.01) G06F 12/00 (2006.01) G06F 12/02 (2006.01) G06F 12/08 (2006.01) G06F 13/00 (2006.01) G06F 13/14 (2006.01) G06F 13/38 (2006.01)

Patent

CA 2328268

A bandwidth conserving queue manager for a FIFO buffer is provided, preferably on an ASIC chip and preferably including separate DRAM storage that maintains a FIFO queue which can extend beyond the data storage space of the FIFO buffer to provide additional data storage space as needed. FIFO buffers are used on the ASIC chip to store and retrieve multiple queue entries. As long as the total size of the queue does not exceed the storage available in the buffers, no additional data storage is needed. However, when some predetermined amount of the buffer storage space in the FIFO buffers is exceeded, data are written to and read from the additional data storage, and preferably in packets which are of optimum size for maintaining peak performance of the data storage device and which are written to the data storage device in such a way that they are queued in a first-in, first-out (FIFO) sequence of addresses. Preferably, the data are written to and are read from the DRAM in burst mode.

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