Quick pixel rendering processing

G - Physics – 06 – T

Patent

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Details

G06T 15/00 (2011.01) G06T 1/20 (2006.01) G09G 5/36 (2006.01)

Patent

CA 2670646

A three-dimensional (3D) graphics pipeline which processes pixels of sub-screens in the last stage (pixel rendering) in parallel and independently. The sub-screen tasks are stored in a list in a shared memory. The shared memory is accessed by a plurality of processing threads designated for pixel rendering. The processing threads seize and lock sub-screens tasks in an orderly manner and process the tasks to create the bit map for display on a screen. The tasks are created by dividing a display area having the vertex information superimposed thereon into MxN sub-screen tasks. Based on system profiling, M and N may be varied.

L'invention concerne un pipeline graphique 3D traitant des pixels de sous-écrans au dernier étage (rendu de pixels) en parallèle et indépendamment. Les tâches de sous-écran sont stockées dans une liste en mémoire partagée. Une pluralité de fils de traitement conçus pour le rendu de pixels accèdent à la mémoire partagée. Ces fils de traitement saisissent et verrouillent des tâches de sous-écran d'une manière ordonnée et traitent ces tâches afin de créer le topogramme binaire à afficher sur un écran. Les tâches sont créées en divisant en MxN tâches de sous-écran une zone d'affichage sur laquelle les informations de sommet sont superposées, M et N pouvant être modifiés en fonction du profilage du système.

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