Ram interface

Details Ram interface Ram interface

G - Physics

06

F

G06F 12/00 (2006.01) G06F 13/00 (2006.01) H04N 7/01 (2006.01) H04N 7/50 (2006.01)

Patent

CA 2145363

The invention provides a RAM interface for connecting a bus to RAM wherein a separate address generator generates the addresses the RAM interface needs to address the RAM. The address generator communicates with the RAM interface via a two wire interface.

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