Ram jfet memory with floating gates

G - Physics – 11 – C

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352/82.3

G11C 11/08 (2006.01) G11C 11/35 (2006.01) G11C 11/404 (2006.01) H01L 27/108 (2006.01)

Patent

CA 1116297

ABSTRACT: JFET memory structures, in particular for RAM's with non-destructive reading-out of the charge state of a floating gate electrode in which the primary selection is realized by means of capacitive coupling with the floating gate electrode. The secondary selection takes place on one of the main electro- des of the JFET structures in which the other main electrode can be connected to the supply. By means of a second common gate electrode the pinch-off voltage of the channels can be adjusted so that the channels are non-conductive in the non- selected condition and a good detection of the information state is obtained in the selected condition.

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