Random access memory (ram) based configurable arrays

G - Physics – 11 – C

Patent

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G11C 11/403 (2006.01) G11C 7/10 (2006.01) G11C 11/406 (2006.01) H03K 19/177 (2006.01)

Patent

CA 2158467

A field programmable device includes two separate and electri- cally isolated arrays (11 and 60) of rows and columns of conductors sharing the same area of an inte- grated circuit substrate, one array (11) interconnecting memory cells to form a random access memory (78) ("RAM"). The other array (60) forms a full or partial cross- point switching networt (65) that is controlled by information stored in memory cells, and/or connects to an operating electronic circuit (66) that is configurable and operable in ac- cordance with information stored in memory cells. In addition, the mem- ory array (11) is easily used to ac- cess desired modes of the circuit ar- ray (60) in order to be able to easily observe internal signals during oper- ation. A preferred memory structure is a dynamic random access memory ("DRAM") because of a high den- sity and low cost of existing DRAM fabrication techniques, even though periodic reading and refreshing of the states of the memory cells is re quired. Several circuits (21, 25 and 41) and techniques are used which allow continuous assertion of the memory cell states without interruption during their refreshing cycles.

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