Read mostly memory cell having bipolar and famos transistor

Details Read mostly memory cell having bipolar and famos transistor Read mostly memory cell having bipolar and famos transistor

G - Physics

11

C

352/82.3

G11C 11/40 (2006.01) G11C 16/04 (2006.01) H01L 27/07 (2006.01) H01L 29/788 (2006.01)

Patent

CA 1048647

READ MOSTLY MEMORY CELL HAVING BIPOLAR AND FAMOS TRANSISTOR Abstract of the Disclosure Disclosed is a memory cell incorporating the major advantages of a read only storage (ROS) and having the flexibility of on-chip personali- zation after processing. In a memory matrix having orthogonally arranged bit lines and word lines with memory cells located at the cross points, each of the disclosed memory cells constructed in accordance with BIFET technology includes a floating gate avalanche breakdown MOS transistor (FAMOS) coupled to a bipolar transistor. The residual charge on the floating gate FAMOS transistor determines the logical state of the read mostly memory cell.

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