Read only memory system

Details Read only memory system Read only memory system

G - Physics

11

C

354/234, 352/40.

G11C 7/00 (2006.01) G06F 12/04 (2006.01) G11C 17/00 (2006.01)

Patent

CA 1039852

ABSTRACT OF THE DISCLOSURE Read only memory system employing an array of memory elements each of which stores 256 8-bit word segments. Each program word to be read out of the system contains 20 bits. The first 8 bits of a program word are stored in a word segment of a first memory element and the second 8 bits are stored in the corresponding word segment of a second memory element. The last 4 bits are stored in 4 bit positions of the corresponding word segment of a third memory element. The other 4 bit positions of this word segment contain the last 4 bits of another program word which has its first 16 bits stored in two other memory elements. The desired program word is read out by addressing the appropriate word segment of every memory element of the array, and by applying memory element select signals to the three memory elements containing portions of the desired program word. The memory element select signal to the third memory element is generated by the memory element select signal to the first and second memory elements. Such a signal to the third memory element would also be generated if the other program word were the program word des- ired. The first 16 bits are read out of the two memory elements directly in parallel. The 4-bit portions of the two program words in the same word seg- ment of the third memory element are read out to two separate gating arrange- ments. The memory element select signal which is applied to the first two memory elements is also applied to the gating arrangement receiving the 4-bit portion of the desired program word. Thus, the last 4 bits of the desired program word are read out through the one gating arrangement while the last ? bits of the other program word from the same word segment of the third mem- ory element are blocked by the other gating arrangement.

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