G - Physics – 11 – C
Patent
G - Physics
11
C
G11C 7/02 (2006.01) G05B 19/04 (2006.01) G05B 19/042 (2006.01) G05B 19/045 (2006.01) G05B 19/048 (2006.01) G05B 19/05 (2006.01)
Patent
CA 2296211
A master circuit and a slave circuit are provided. The master circuit has a first presettable counter for setting a first cycle, and a clock pulse generating circuit for producing an instruction pulse at the first cycle determined by the first presettable counter, the slave circuit has a second presettable counter for setting a second cycle, and a pulse generating circuit for producing a plurality of pulses at the second cycle in response to the instruction pulse from the master circuit. There is provided a gate array comprising a plurality of gates and formed into an integrated circuit having a plurality of pins, and provided for relaying signals among signals from the master circuit and slave circuit. A transistor array is connected to an input for decreasing an input impedance of the controller.
Kuze Yoshikazu
Ridout & Maybee Llp
LandOfFree
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