Real-data fft buffer

Details Real-data fft buffer Real-data fft buffer

G - Physics

06

F

G06F 17/14 (2006.01) G06F 5/06 (2006.01)

Patent

CA 2097635

A FFT buffer circuit having at least three FIFO buffers and a FIFO buffer select circuit to separate incoming real-data into its in-phase and quadrature components and to output each component to a separate port for FFT, and also having a modified overflow detect circuit to automatically detect and eliminate overflow in the incoming real-data stream. In addition, the invention utilizes link hook-ups and receiver control signals for external control of both the automatic overflow reset and the data buffer timing.

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