Real time processing system

G - Physics – 06 – F

Patent

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Details

G06F 13/16 (2006.01) G06F 13/38 (2006.01) G06F 15/17 (2006.01)

Patent

CA 2129825

A real time data processing system consisting of a plurality of processing nodes (NODE1, NODE2, NODE3) and a write only reflective data link (46) for transferring information containing writes only between the plurality of processing nodes (NODE1, NODE2, NODE3). All the nodes (NODE1, NODE2, NODE3) include a bus (22), a processor (20) coupled to the bus (22), a memory (40) having at least two ports with one port (42) connected to the bus (22) and the other port (48) connected to the data link (46) and a sensor (60) for sensing a write to the memory (40). At least one node has a VME bus (22) as the bus (22) and serves as an I/O connected to one port (42) of the memory (40). Further a local bus (24) is included for inputting and outputting from the memory (40). The local bus (24) is connected to a third port (44) of the memory (40).

Système de traitement en temps réel constitué d'une série de noeuds de traitement (noeud 1, noeud 2, noeud 3) et d'une liaison de données de réflexion accessibles en écriture seulement (46) pour transférer les informations contenant des indications d'écriture seulement entre les divers noeuds de traitement (noeud 1, noeud 2, noeud 3). Tous les noeuds (noeud 1, noeud 2, noeud 3) comportent un bus (22), un processeur (20) couplé au bus (22), une mémoire (40) comportant au moins deux voies d'accès, l'une (42) reliée au bus (22) et l'autre (48) reliée à la liaison de données (46), et un capteur (60) permettant de détecter une écriture en mémoire (40). Un noeud au moins comporte un bus VME (22) en tant que bus (22) et sert d'entrée/sortie reliée à une voie d'accès (42) de la mémoire (40). En outre, un bus local (24) est prévu pour introduire ou extraire des données de la mémoire (40). Le bus local (24) est connecté à une troisième voie d'accès (44) de la mémoire (40).

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