Receive/bypass circuit for subsystems in polling system

Details Receive/bypass circuit for subsystems in polling system Receive/bypass circuit for subsystems in polling system

H - Electricity

04

Q

340/90

H04Q 1/20 (2006.01) G06F 11/20 (2006.01) H04L 12/423 (2006.01) H04L 12/437 (2006.01)

Patent

CA 1124813

RECEIVE/BYPASS CIRCUIT FOR SUBSYSTEMS IN POLLING SYSTEM Abstract A polling system includes a central processor and a plurality of subsystems connected in a loop to the central processor. A receive/bypass circuit in each subsystem includes a depletion mode field effect transistor having its drain and source electrodes connected in series in a bypass line at the subsystem. A control circuit is connected to a polling signal input line at each subsystem. When the subsystem has power, the control circuit routes the polling signal to a terminal device in the subsystem while estab- lishing a conduction-inhibiting voltage at the gate electrode of the field effect transistor. When the subsystem is unpowered or out of service, a switching transistor in the control circuit isolates the terminal device from the polling signal input line. The polling signal bypasses an unpowered subsystem through the unbiased field effect transistor in the bypass line. RA9-77-009

332646

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