H - Electricity – 04 – J
Patent
H - Electricity
04
J
H04J 11/00 (2006.01) H04B 1/10 (2006.01) H04B 14/08 (2006.01) H04B 17/02 (2006.01) H04J 1/20 (2006.01) H04L 7/00 (2006.01) H04L 7/033 (2006.01) H04L 12/56 (2006.01) H04L 27/06 (2006.01) H04L 27/22 (2006.01)
Patent
CA 2297873
K sub-carrier components from an FFT circuit 101 are output to a sub-carrier demodulating circuit 102. The sub-carrier demodulating circuit 102 demodulates the k sub-carrier components and outputs a transmitted information bit to an output terminal 104. Further, the sub-carrier demodulating circuit 102 outputs distortion correction coefficients C(1) - C(k) that are used during demodulation of each sub-carrier, each of sub-carrier components S(1) - S(k) in which distortion is corrected, and determination signal points R(1) - R(k) for each sub-carrier to a phase estimating circuit 103. The phase estimating circuit 103 receives C(1) - C(k), R(1) - R(k) and S(1) - S(k), and outputs a phase error signal to an output terminal 105. The phase error signal output to the output terminal 105 is integrated by a loop filter and so forth, and is fed back to a local oscillator, and thereby, phase tracking is conducted.
Okanoue Kazuhiro
Osawa Tomoki
Yamamoto Takeshi
Corporation Nec
Smart & Biggar
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