Reducing charging effects in charged-particle-beam lithography

H - Electricity – 01 – L

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356/132

H01L 21/42 (2006.01) H01L 21/027 (2006.01)

Patent

CA 1157575

REDUCING CHARGING EFFECTS IN CHARGED-PARTICLE-BEAM LITHOGRAPHY Abstract of the Disclosure In a charged-particle-beam lithographic system, charge accumulation on the workpiece during alignment or writing can cause significant pattern placement errors. A film formed directly under the resist layer to be patterned is utilized as a charge-conducting medium during lithography. The pattern delineated in the resist layer is transferred into the film and subsequently into an underlying layer. The film is highly compatible with standard lithographic and etching processes used to fabricate LSI and VLSI circuits.

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