Reduction processor

G - Physics – 06 – F

Patent

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Details

G06F 9/44 (2006.01) G06F 7/57 (2006.01) G06F 9/302 (2006.01) G11C 11/419 (2006.01) G11C 15/04 (2006.01)

Patent

CA 2086591

2086591 9202876 PCTABS00010 A reduction processor is provided, which is controlled by a program having a structure and which is adapted to reduce said structure in a number of reduction steps including different kinds of reductions. A first order processor of this kind includes an active storage (1, 2) in turn including a) a plurality of active storage cells, each able to store information, which could give rise to a reduction. b) A communication net communicating the result of each reduction to all cells having connection to said result. The processor includes a control means (6) in common for all the storage cells. Preferably, at least one of the storage cells, called core cell (2) or structure arithmetic unit, is able to perform all kinds of reductions, and the rest of said cells, called object storage cells, are able to perform only limited parts of some of all kinds of reductions. Further, several reduction processors could be connected to each other by a network and thereby form a higher order reduction processor.

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