Refresh counter

Details Refresh counter Refresh counter

G - Physics

06

F

354/241

G06F 13/00 (2006.01) G11C 11/406 (2006.01) H03K 21/00 (2006.01)

Patent

CA 1145857

REFRESH COUNTER ABSTRACT OF THE DISCLOSURE A refresh counter which uses existing address buffers and is implemented with refresh address storage and decoders. The address buffers act to multiplex the refresh address storage outputs as inverted outputs when properly enabled. When all lower order bits are true at a particular unit of the refresh counter and a transfer clock signal occurs, the outputs of the buffer are transferred to the refresh storage where the buffer multiplexes them when enabled. The clocking scheme is structured to enable only at the end of a re- fresh cycle. In this manner, the counter is incremented at the end of each refresh cycle.

358160

Affiliated with

Also associated with

Rating

Refresh counter does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Refresh counter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Refresh counter will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-152402