Representing the design of a sub-module in a hierarchical...

Details Representing the design of a sub-module in a hierarchical... Representing the design of a sub-module in a hierarchical...

G - Physics

06

F

G06F 17/50 (2006.01)

Patent

CA 2450143

A method for modeling integrated circuit designs in a hierarchical design automation system which utilizes a block abstraction including therein set of all database objects (cells, nets, wires, vias, and blockages) that are necessary to achieve accurate placement, routing, extraction, simulation, and verification of the block's ancestors in the hierarchy.

L'invention concerne un procédé destiné à modeler des conceptions de circuit intégré dans un système hiérarchique de conception assistée par ordinateur qui utilise une abstraction de bloc contenant un ensemble de tous les objets de base de données (cellules, interconnexions, fils, trous de liaison et blocages) nécessaire à réaliser un placement, un acheminement, une extraction, une simulation et une vérification adéquats des noeuds ancêtres du bloc dans la hiérarchie.

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