Reversible analog to digital converter (adc-dac) with analog...

H - Electricity – 03 – M

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H03M 1/12 (2006.01) H03M 1/02 (2006.01) H03M 1/38 (2006.01) H03M 1/40 (2006.01) H03M 1/44 (2006.01) H03M 1/72 (2006.01)

Patent

CA 2111105

2111105 9222961 PCTABS00018 A Synchronous Analog to Digital (SYMAD) Convertor cell (12), and circuits formed therefrom, for converting an analog signal into a discrete binary code. An analog signal is processed by sample and hold circuitry and then compared to a reference voltage by a comparator (75). The comparator output is the converted digital output. The output is coupled back to the control input of an analog switch (81) which selects either the reference voltage or a predetermined potential, typically zero volts, to couple to an inverting input of an operational amplifier (76). The analog signal input is also coupled to the non-inverting input of the operational amplifier. The operational amplifier is configured as a differential amplifier with a gain of two. If the digital output of the comparator is a logic 1, then the operational amplifier output is two times the difference between the analog signal and the reference voltage. If the digital output of the comparator is a logic 0, then the output of the operational amplifier is two times the analog signal. As many SYMAD cells as necessary may be provided to obtain a desired resolution. Also disclosed are cyclic, chopper stabilized, zeroing A/D converters, switched resistor converter cells, logarithmic converters, including an A/D converter that provides a floating point output, an edge triggered sample and hold circuit, and an array of configurable analog converter cells for implementing a desired analog signal processing function.

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