Ride-through energy boost circuit

Details Ride-through energy boost circuit Ride-through energy boost circuit

H - Electricity

02

J

323/6

H02J 9/06 (2006.01) G06F 1/30 (2006.01)

Patent

CA 1290013

ABSTRACT OF THE DISCLOSURE A method and an apparatus which delay initiation of a shut down procedure in a computer to allow the riding through of variations in a power supply. An interrupter receives and interrupts an asserted shut down signal and outputs an interrupt signal when the shut down signal has been asserted. A gate trigger is coupled to the interrupter and triggers an energy booster to raise the power supplied to the computer when the gate trigger receives the interrupt signal from the interrupter. The amount of energy remaining in the energy booster is monitored by a monitor and a depletion signal is outputted when the amount of energy remaining in the energy booster is below a reference value. An output stage has inputs coupled to the interrupter and the monitor, and receives at these inputs the interrupt signal and the depletion signal and outputs a re-asserted shut down signal to the computer when both the interrupt signal and the depletion signal are present at the inputs of the output stage.

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