H - Electricity – 04 – Q
Patent
H - Electricity
04
Q
H04Q 3/42 (2006.01) H04L 12/56 (2006.01) H04Q 11/04 (2006.01)
Patent
CA 2061850
A new architecture of an ATM or ATM/STM switching node which is functionally equivalent to the classical buffer- space-buffer (BSB) architecture is disclosed. In the basic embodiment, it uses middle packet buffers with a rotator (commutator) at its input and output. It has two main advantages over the BSB architecture. First of all, in the ATM mode, the need for arbitration when more than one inlet competes for the same outlet during the same time slot is eliminated. Each packet knows when to proceed without being aware of the competing packets. This greatly simplifies the switching-control mechanism. Secondly, the switch hardware complexity is reduced through the use of clock-driven rather than state- controlled cross points. The cross-point ratio is 4/?n, where n is the number of inlets (outlets).
Beshai Maged E.
Munter Ernst August
Na
Nortel Networks Limited
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