G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 15/17 (2006.01) G06F 11/10 (2006.01) H04L 12/56 (2006.01) G06F 11/00 (2006.01) G06F 11/16 (2006.01)
Patent
CA 2178393
A multiprocessor system includes a number of sub- processor systems, each substantially identically constructed, and each comprising a central processing unit (CPU), and at least one I/O device, interconnected by routing apparatus that also interconnects the sub-processor systems. A CPU of any one of the sub-processor systems may communicate, through the routing elements, with any I/O device of the system, or with any CPU of the system. Communications between I/O devices and CPUs is by packetized messages. Interrupts from I/O devices are communicated from the I/O devices to the CPUs (or from one CPU to another CPU) as message packets. CPUs and I/O devices may write to, or read from, memory of a CPU of the system. Memory protection is provided by an access validation method maintained by each CPU in which CPUs and/or I/O devices are provided with a validation to read/write memory of that CPU, without which memory access is denied.
Garcia David J.
Horst Robert W.
Iswandhi Geoffrey I.
Krause John C.
Sonnier David Paul
Smart & Biggar
Tandem Computers Incorporated
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