Row decoder circuit for use in programming a memory device

Details Row decoder circuit for use in programming a memory device Row decoder circuit for use in programming a memory device

G - Physics

11

C

G11C 16/06 (2006.01) G11C 8/08 (2006.01) G11C 8/10 (2006.01) G11C 16/08 (2006.01) G11C 16/12 (2006.01)

Patent

CA 2489766

A row decoder circuit (14) for use in programming a memory device. The row decoder circuit includes a means (13) for selecting the wordline of a memory cell to be programmed and a wordline of a memory cell to be programmed and a wordline driver circuit (100) that switches (15, 19) between a first power supply line (18) that supplies a programming voltage (VPROGRAM) and a second power supply line (16) that supplies a read/verify voltage (VVERIFY) in order to provide either the programming voltage or the read/verify voltage to the gate of a selected memory cell on the wordline (17). This switching between programming and read/verify voltages results in the programming pulses used to program the selected memory cell. The present invention allows for shorter programming pulses to be used and provides faster speeed in the overall programming of the memory cell.

Cette invention se rapporte à un circuit décodeur de lignes (14) à utiliser pour la programmation de dispositifs mémoires et comprenant à cet effet un moyen (13) destiné à sélectionner le canal mot d'une cellule mémoire à programmer et un circuit pilote de canal mot (100) qui effectue une commutation (15, 19) entre une première ligne d'alimentation (18) qui fournit une tension de programmation (V<SB>PROGRAMMATION</SB>) et une seconde ligne d'alimentation (16) qui fournit une tension de lecture/vérification (V<SB>VERIFICATION</SB>) afin d'appliquer soit la tension de programmation soit la tension de lecture/vérification à la porte d'une cellule mémoire sélectionnée sur le canal mot (17). Cette commutation entre le tension de programmation et la tension de lecture/vérification produit des impulsions de programmation servant à programmer la cellule mémoire sélectionnée. Cette invention permet d'utiliser des impulsions de programmation plus courte et accélère toute la programmation de la cellule mémoire.

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