Sample-and-hold circuit with current gain

Details Sample-and-hold circuit with current gain Sample-and-hold circuit with current gain

G - Physics

01

R

328/171

G01R 29/00 (2006.01)

Patent

CA 1111516

SAMPLE-AND-HOLD CIRCUIT WITH CURRENT GAIN Abstract of the Disclosure The subject invention is a sample-and-hold circuit that provides current gain and that is suitable for construction according to LSI (large scale integration) techniques. The circuit incorporates a bipolar transistor biased on (in the "sample" mode) to a predetermined quiescent state. A capacitor is connected across the output of the circuit (i.e. across the output of the bipolar transistor) to be charged to a certain voltage by the bipolar transistor and to store this voltage when the sample-and-hold circuit is in the "hold" mode of operation. IGFETS (insulated gate field effect transistors) are employed to bias the bipolar transistor and to switch the circuit from one mode of operation to the other.

315106

Affiliated with

Also associated with

Rating

Sample-and-hold circuit with current gain does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Sample-and-hold circuit with current gain, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Sample-and-hold circuit with current gain will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1117512