Scan-out system

G - Physics – 11 – C

Patent

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Details

354/237, 352/38

G11C 19/28 (2006.01) G01R 31/3185 (2006.01) G06F 11/30 (2006.01)

Patent

CA 1181846

ABSTRACT OF THE DISCLOSURE For a shift register which is formed by a memory and the number of shift stages of which is determined by designating a read address of the memory by the count value of a counter and designating a read address of the memory by a value obtained by subtracting an arbitrary constant from the count value of the counter through using an operator, a multiplexer is provided at the input side of the operator. Output data, obtained by selecting either one of a constant for determining the number of shift stages of the counter and a scan address in accordance with a scan enable signal, is provided to the operator. When the constant for determining the number of shift stages of the counter is input, the operation of the shift register is carried out and when the scan address is input, the content of each stage of the shift register is scanned out.

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