H - Electricity – 01 – L
Patent
H - Electricity
01
L
H01L 29/812 (2006.01) H01L 29/08 (2006.01)
Patent
CA 2116087
ABSTRACT OF THE DISCLOSURE This invention has as its object to easily obtain a MESFET free from output distortion. For this purpose, in this invention, an n+-type layer is formed at a substrate position spaced apart from a gate electrode by a distance of a side-etch amount Lg-n+. The n+-type layer has an impurity concentration and thickness such that a surface depletion layer generated depending on a surface level on the drain-side does not almost extend to the drain-side. An n'-type layer as an intermediate concentration layer has an impurity concentration and thickness such that a drain-side end portion of a channel depletion layer generated upon applying a voltage to the gate electrode extends to the drain-side with an increase in this applied voltage. Moreover, the n+-type layer, a distance Lg-n+, and the n'-type layer are formed to have a relationship in which a ratio of an extension length L of the drain-side end portion of the channel depletion layer from the drain-side end portion A of the gate electrode to the drain-side, to a gate length Lg falls within a predetermined range. Therefore, according to this invention, the long gate effect and the effect for the drain current in accordance with the square characteristics cancel each other, and an FET output changes linearly in response to an input.
Marks & Clerk
Sumitomo Electric Industries Ltd.
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