Sealing and stress relief layers and use thereof

Details Sealing and stress relief layers and use thereof Sealing and stress relief layers and use thereof

H - Electricity

01

L

356/5

H01L 23/485 (2006.01) H01L 23/498 (2006.01)

Patent

CA 1286791

ABSTRACT Sealing and stress relief are provided to a low-fracture strength glass-ceramic substrate. Hermeticity is addressed through the use of capture pads in alignment with vias and through polymeric overlayers with interconnection between the underlying via or pad metallurgy and the device, chip, wire or pin bonded to the surface of the layer. Multilevel structures are taught along with a self-aligned sealing and wiring process.

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