Secure programmable logic device

Details Secure programmable logic device Secure programmable logic device

H - Electricity

03

K

H03K 19/177 (2006.01) G06F 12/14 (2006.01) G06F 21/00 (2006.01) G11C 16/22 (2006.01)

Patent

CA 2415177

A programmable logic chip (21) and configuration memory chip (23) are mounted within a multi-chip module (25) to form a single package. The configuration memory has a security bit (24) which in a first state allows programming a read-back of configuration data in the memory chip via external pins (29) of the package, and in a second state allows only erase command to be communicated to the memory chip via the external pins. The internal data transfer connection (27) between the memory chip and programmable logic chip is enabled when the security bit is in the second state and the memory chip is in a read-back mode, allowing configuration data to be loaded into the logic chip upon power up.

L'invention concerne un microcircuit de logique programmable (21) et un microcircuit de mémoire de configuration (23) sont montés dans un module multimicrocircuit (25) afin de former un boîtier unique. La mémoire de configuration possède un bit de sécurité (24) qui dans un premier état permet la programmation et la lecture en retour de données de configuration dans le microcircuit de mémoire via les broches externes (29) du boîtier, et qui dans un second état permet uniquement de communiquer une commande d'effacement au microcircuit de mémoire via les broches externes. La liaison de transfert de données internes (27) entre le microcircuit de mémoire et le microcircuit de logique programmable est autorisée lorsque le bit de sécurité se trouve dans le second état et que le microcircuit de mémoire est en mode de lecture en retour, permettant ainsi aux données de configuration d'être chargées dans le microcircuit de logique lors de la mise sous tension.

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