Selectively doping isolation trenches utilized in cmos devices

Details Selectively doping isolation trenches utilized in cmos devices Selectively doping isolation trenches utilized in cmos devices

H - Electricity

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H01L 21/762 (2006.01) H01L 21/033 (2006.01) H01L 21/316 (2006.01)

Patent

CA 1243420

- 13 - SELECTIVELY DOPING ISOLATION TRENCHES UTILIZED IN CMOS DEVICES Abstract To provide more effective dielectric-filled isolation trenches in CMOS integrated circuit devices, one surface portion of the trenches is masked (42) and a dopant is introduced into the unmasked surface portion to enhance or increase the doping level thereof. The mask is then removed and a dopant of the opposite type conductivity is introduced into all the trench surfaces. The doping levels are selected so that the resulting doping concentrations of the trench surface portions are enhanced in comparison with the original doping levels thereof to prevent conductivity type inversion of the surface portions during device operation.

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