Self-aligned electrical interconnect for two assembled...

H - Electricity – 01 – L

Patent

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Details

IPC codes

H01L 25/00 (2006.01) B81B 7/00 (2006.01) H01L 23/52 (2006.01) H05K 1/14 (2006.01)

Type

Patent

Patent number

CA 2366618

Description

A self aligned electrical interconnect for two assembled perpendicular semiconductive chips is formed by a slot in a carrier chip having a notch with a metal trace. The other device chip is perpendicularly placed in the slot and has a matching metal trace. The chips are then bonded together by the traces to provide for fine perpendicular alignment of the assembled chips.

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