Self aligned mesfet made using substitutional gate

Details Self aligned mesfet made using substitutional gate Self aligned mesfet made using substitutional gate

H - Electricity

01

L

356/149

H01L 29/80 (2006.01) H01L 21/338 (2006.01)

Patent

CA 1276315

ABSTRACT A process for producing a semiconductor device includes depositing a layer of insulator material onto a supporting substrate of the type having a surface which includes a channel region below the surface thereof containing a carrier concentration of a desired conductivity type, removing selected portions of the insulator material to form a substitutional gate on the substrate surface, forming side walls bounding substitutional gate to define an effective masking area in cooperation with the substitutional gate, ion implanting a dopant into the unmasked region of the substrate, removing the side walls, annealing the resultant device, removing the substitutional gate, depositing gate metal and first and second ohmic contacts in correct positional relation to one another on the substrate, and depositing metallic interconnects in electrical communication with the ohmic contacts to produce a semiconductor device. This technique is especially useful in the production of Group III-V compound semiconductors, particularly gallium arsenide semiconductors.

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