Self-aligned method for making bipolar transistor having...

Details Self-aligned method for making bipolar transistor having... Self-aligned method for making bipolar transistor having...

H - Electricity

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356/185

H01L 21/203 (2006.01) H01L 21/033 (2006.01) H01L 23/532 (2006.01)

Patent

CA 1142275

Self Aligned Method For Making Bipolar Transistor Having Minimum Base to Emitter Contact Spacing Abstract A method for making a high performance bipolar transistor characterized by self-aligned emitter and base regions and minimized base and emitter contact spacing. The disclosed method comprises forming a recessed oxide-isolated structure having opposite Conductivity epitaxial layer and substrate. Multiple layered mesas of alternating silicon nitride and silicon dioxide layers are placed over the base region and over the collector reach-through region. Polycrystalline silicon is deposited between the mesas. The mesas are undercut-etched to expose the extrinsic base region which is ion implanted. Then, the mesas are removed to expose the emitter and intrinsic base regions as well as the collector reach-through regions. The latter exposed regions are ion implanted appropriately. Contacts are made directly to the emitter and collector reach-through regions and indirectly via the polysilicon to the base region.

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