Self-clocking binary receiver

Details Self-clocking binary receiver Self-clocking binary receiver

H - Electricity

04

L

354/67, 328/83

H04L 25/48 (2006.01) H04L 25/49 (2006.01)

Patent

CA 1198780

Abstract of the Disclosure Binary data is transmitted as signals of two different pulsewidths to respectively represent logic "0" and "1". At the data receiver, the ratio of the pulsewidths is converted into a corresponding voltage ratio, which, in turn, is applied through a voltage divider to develop clock- and data-control signals at two different levels. Switching devices are respectively actuated whenever the clock- and data-control signals reach preset voltage levels to respectively produce self-synchronized clock and data pulses corresponding to the received binary data.

440639

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