Self configuring memory system

Details Self configuring memory system Self configuring memory system

G - Physics

06

F

354/241

G06F 12/00 (2006.01) G06F 12/06 (2006.01)

Patent

CA 1323114

ABSTRACT OF THE DISCLOSURE A self configuring memory for a computer system. Memory is distributed between a central processor unit (CPU) memory and expansion memory boards that are selectively insertable into expansion slots of the computer system. The CPU memory board and expansion memory boards each provide signals indicating the respective sizes of the memories. Logic circuitry on each expansion memory board determines the cumulative amount of memory in the system. This value is passed on to an adjacent expansion memory board such that the logic circuitry on each board determines the range of addresses corresponding to the physical memory space resident on the board. When an address within that range is accessed by the CPU, the logic circuitry generates an acknowledgement signal hat is returned to the CPU. In an intialization routine, the CPU tests the acknowledgement signal for each address in a sequence of addresses to determine the upper limit of the addressing range available in the computer system.

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