G - Physics – 06 – F
Patent
G - Physics
06
F
354/239
G06F 9/22 (2006.01) G06F 9/26 (2006.01)
Patent
CA 1126409
SELF-CONTAINED RELOCATABLE MEMORY SUBSYSTEM Abstract of the Disclosure An apparatus for use as part of a computer system's external memory for storing a subprogram used by the computer and modifying selected data words read from the apparatus prior to transmission to the computer. The apparatus includes an addressable read only memory (ROM) having a word size which is greater than the instruction word size used by the computer. The apparatus also includes a plurality of base registers which may be loaded under control of the computer's operating system program. The read only memory contains a software subprogram written assuming it is stored at an absolute location in the computer's memory system other than its actual location. Each ROM location contains one instruction or word of data and a plurality of non-data bits which may specify one of the plurality of base registers. As a word is read out of the ROM, a decoding circuit decodes the non-data bits to determine which, if any, of the base registers is specified. If a base register is specified, the decoding circuit triggers a gating circuit connected to the specified base register. The triggered gating circuit gates the contents of the specified base register into an adder, the other input to the adder coming from the data bits read from the ROM. The resulting data word, modified by the addition of the specified base register's contents, is fed into a driver circuit which transmits it to the computer. If no base register is specified by the non-data bits, the decoder circuit does not trigger any of the gating circuits, and a pattern of all zeros is provided as one input to the adder, the second input being the data -1- bits read from the ROM. In such case, the resulting data word sent to the computer represents the unmodified data bits read out of the ROM.
332280
Burroughs Corporation
R. William Wray & Associates
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