Self precharging static programmable logic array

Details Self precharging static programmable logic array Self precharging static programmable logic array

H - Electricity

03

K

328/130

H03K 19/177 (2006.01) H03K 5/1534 (2006.01)

Patent

CA 1299681

53.1103 ABSTRACT A programmable logic array having a number of inputs for receiving operand data and a number of outputs for furnishing the results of Boolean operations upon the operand data is provided with a precharge signal generator responsive to a state transition in the operand data for generating a precharge signal. The buffered operand data is furnished to an AND plane, and pullup circuits associated therewith are responsive to the precharge signal for charging the AND plane and sustaining the charge on all AND plane array lines in the logical ONE state. An OR plane is connected to the outputs of the AND plane, and pullup transistors associated with the OR plane are responsive to the precharge signal for charging the OR plane and sustaining the charge on all OR plane array lines in the logical ONE state. The PLA outputs are taken from the buffered outputs of the OR plane.

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