Self-test method and apparatus

G - Physics – 01 – R

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G01R 31/30 (2006.01) G01R 31/3161 (2006.01)

Patent

CA 1198775

-16- Abstract of the Disclosure A self-test system is disclosed wherein a micropro- cessor controlled system under test, including a ROM, and a microprocessor, may generate a raise-to-maximum signal. In response to this raise to maximum signal, a power supply generates a supply voltage having a magni- tude equivalent to the maximum rated voltage of the power supply. A self-test program encoded in the ROM directs the microprocessor to interrogate the components of the system under test when energized by the maximum rated supply voltage. The microprocessor controlled sys- tem under test then generates a lower to minimum signal. In response to this lower to minimum signal, the power supply generates a supply voltage having a magnitude equivalent to the minimum rated voltage of the power supply. The microprocessor, under the instructions of the self-test program, interrogates the components of the system under test when energized by the minimum rated supply voltage. When the raise to maximum signal and the lower to minimum signals are not generated, the power supply develops a nominal power supply voltage for energizing the components of the system under test. The components of the system under test are interrogated when energized by the nominal power supply voltage. Since the components of the system under test are ener- gized by a supply voltage having a magnitude ranging from a minimum to a maximum rated power supply voltage while being interrogated by the microprocessor during the self-test mode, all of the defective or potentially defective components of the system under test will fail during the performance of the self-test interrogation. Replacement thereof will ensure that the system will operate more efficiently and more reliably.

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