Self timed dynamic semiconductor memory array

G - Physics – 11 – C

Patent

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G11C 13/00 (2006.01) G11C 11/40 (2006.01) G11C 11/404 (2006.01) G11C 11/405 (2006.01) G11C 11/406 (2006.01) G11C 11/407 (2006.01) H03K 5/02 (2006.01)

Patent

CA 1042549

SEMICONDUCTOR MEMORY ARRAY Abstract of the Disclosure A 1024 bit semiconductor memory system, fabricated on a single integrated circuit chip, utilizes dynamic memory cells and low power dynamic control circuitry. An initial input control signal activates the control circuitry which internally generates all the control signals. The timing of all the internally generated control signals is automatically maintained by the control circuits.

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