G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 13/42 (2006.01) H04L 7/033 (2006.01)
Patent
CA 2150744
A self-timed interface (STI) in which a clock signal clocks bit serial data onto a parallel, electrically conductive bus and the clock signal is transmitted on a separate line of the bus. The received data on each line of the bus is individually phase aligned with the clock signal. The received clock signal is used to define boundary edges of a data bit cell individually for each line and the data on each line of the bus is individually phase adjusted so that, for example, a data transition position is in the center of the cell.
Capowski Robert Stanley
Casper Daniel Francis
Ferraiolo Frank David
Jordan Richard Carroll
Laviola William Constantino
Barrett B.p.
International Business Machines Corporation
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