Semiconductor chip package

Details Semiconductor chip package Semiconductor chip package

H - Electricity

05

K

356/10

H05K 1/14 (2006.01) H01L 23/50 (2006.01) H01L 23/66 (2006.01) H05K 7/10 (2006.01)

Patent

CA 1202732

- 13 - SEMICONDUCTOR CHIP PACKAGE Abstract A high-speed, high pin-out chip carrier package for interconnecting at least one semiconductor integrated circuit chip to a circuit board is disclosed. The package includes a ground plane, a power plane, and at least one signal layer comprising plural conductors. Layers of dielectric material separate adjacent conductive layers. By selection of the width of each signal conductor and its distance to the nearest ground or power plane, the package is impedance-matched to the circuit board. Plural plated- through holes are disposed through the package for electrically interconnecting the signal conductors, the ground plane, and the power plane to the circuit board, and are arranged in a symmetrical pattern to reduce inductive noise.

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