Semiconductor chip packages having solder layers of enhanced...

Details Semiconductor chip packages having solder layers of enhanced... Semiconductor chip packages having solder layers of enhanced...

H - Electricity

01

L

356/183, 356/9

H01L 23/02 (2006.01) H01L 23/04 (2006.01)

Patent

CA 1215474

SEMICONDUCTOR CHIP PACKAGES HAVING SOLDER LAYERS OF ENHANCED DURABILITY ABSTRACT OF THE DISCLOSURE Solder layers in a semiconductor chip package, which electrically interconnect conductors used to gain electrical access to the electrodes on the semiconductor chip, are sub- jected to a transverse compressive force in excess of about 2 pounds per square inch. The semiconductor chip package can thereby undergo a marked increase in the number of cycles of heating and cooling before it falls due to increased thermal resistance arising from structural degradation of the solder layers.

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