Semiconductor device

G - Physics – 11 – C

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G11C 11/40 (2006.01) G11C 16/10 (2006.01) G11C 16/14 (2006.01) H01L 29/788 (2006.01)

Patent

CA 1228424

23 ABSTRACT: The invention relates to an EPROM or an EEPROM in which the information is stored in the form of elec- trical charge above the channel region of a MOST, as a result of which the threshold voltage of the MOST is determined by the stored information. Writing/erasing of the memory generally requires high voltages to cause charge current to flow through an insulating layer to and from the charge storage region. In order to avoid para- sitic MOSTs becoming conductive, means are provided by which during operation a small reverse bias is applied to the sources of these parasitic transistors, as a result of which due to the high ? factor the threshold voltage of the parasitic transistors increases considerably. This does not require additional logic because use can be made of the generator in the reading circuit, which generates a suitable small voltage.

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