H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/147
H01L 21/02 (2006.01) H01L 21/027 (2006.01) H01L 21/762 (2006.01) H01L 21/768 (2006.01)
Patent
CA 1204883
ABSTRACT OF THE DISCLOSURE A semiconductor device in which an insulator or conduc- tor film is closely deposited in a groove formed in a semicon- ductor substrate or an insulating or conductor layer thereon to planarize the surface thereof. A semiconductor device manufac- turing process in which a specimen is selectively etched away through using a resist pattern as a mask, a pattern forming film is deposited by a plasma deposition technique on the specimen, and the resist film is removed, whereby the pattern forming film fills up a groove formed by etching to provide a planarized surface. As the invention permits the deposition in a groove of a flat topped region which can be made coplanar with the upper surface of the substrate or layer carried on the substrate the overall height of the device can be kept small thereby increasing the packing density.
401294
Ehara Kohei
Itsumi Manabu
Matsuo Seitaro
Muramoto Susumu
Fetherstonhaugh & Co.
Nippon Telegraph And Telephone Corporation
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