Semiconductor device and method of manufacturing such a...

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H01L 29/40 (2006.01) G11C 11/411 (2006.01) H01L 21/762 (2006.01) H01L 27/07 (2006.01) H01L 27/102 (2006.01) H01L 29/10 (2006.01)

Patent

CA 1171552

PHF 80.592 16 ABSTRACT: Semiconductor device for use in bistable memory cells having two transistors with two emitters for use in emitter-coupled logic. In such a cell one of the emitter regions of each transistor is integrated in a lateral extension of the base region which serves as a resistive zone. The pinching zone which is situated below one of the emitters obtains a selective overdropping with respect to in particular the pinching zone which is present below the other emitter. As a result a good ohmic value for the resistive zone is obtained.

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