Semiconductor device and wafer structure having a planar...

H - Electricity – 01 – L

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H01L 23/522 (2006.01) H01L 21/44 (2006.01) H01L 21/441 (2006.01) H01L 21/48 (2006.01) H01L 21/74 (2006.01) H01L 21/762 (2006.01) H01L 21/98 (2006.01)

Patent

CA 2105039

A wafer structure suitable for the formation of semiconductor devices thereon and having a buried interconnect structure for interconnection of desired ones of the semiconductor devices according to a predetermined interconnection pattern and a method of making the same is disclosed. The wafer structure comprises a primary substrate having a first thickness appropriate for the formation of the desired semiconductor devices. The primary substrate further comprises a) conductive interconnection pads of a second thickness formed on a bottom surface of the primary substrate according to the predetermined interconnection pattern, b) first isolation pads of a third thickness formed on the bottom surface of the primary substrate between the conductive interconnection pads, and c) interconnection pad caps of a fourth thickness formed upon the surface of the interconnection pads opposite from the primary substrate, wherein the interconnection pad caps comprise a material suitable for wafer bonding, and further wherein the total thickness of the second thickness and the fourth thickness equals the third thickness. The structure further comprises a secondary substrate having an oxide layer thereon bonded to the interconnection pad caps and the first isolation pads of the primary wafer.

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