Semiconductor device fabrication including a non-...

Details Semiconductor device fabrication including a non-... Semiconductor device fabrication including a non-...

H - Electricity

01

L

356/117

H01L 21/70 (2006.01) G03F 7/20 (2006.01)

Patent

CA 1277432

Abstract: The present invention relates to a method of semiconductor integrated circuit fabrication. The method comprises the steps of coating a substrate surface of at least one wafer of a lot having a plurality of wafers with a positive resist; exposing selectively the resist to radiation at least two times, one of the times defining integrated circuit features and one of the times defining edge type features, at least one of the edge type features overlapping at least one of the integrated circuit features. The method further comprises developing the resist and examining at least one region where the integrated circuit features and edge type features overlap to produce a photocleave at the integrated circuit features and continuing device fabrication of the wafers of the lot if information derived from the photocleave is adequate.

557475

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