Semiconductor device having a passivated surface

H - Electricity – 01 – L

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H01L 27/04 (2006.01) H01L 21/314 (2006.01) H01L 21/56 (2006.01) H01L 21/70 (2006.01) H01L 23/29 (2006.01) H01L 23/31 (2006.01)

Patent

CA 1069620

ABSTRACT A semiconductor device in which at least a part of the active surface is covered by a passivating combined layer. According to the invention the passivating combined layer com- prises two layers of the same semiconductor material lying one on top of the other, the lower-most layer having a resistivity of at least 1010 ohm.cm, and the layer present thereon having a resistivity of at most 108 ohm.cm.

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