Semiconductor device having a well structure

H - Electricity – 01 – L

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356/162

H01L 29/06 (2006.01) H01L 21/762 (2006.01) H01L 27/092 (2006.01)

Patent

CA 1200328

- 1 - Abstract: A semiconductor device with a well structure is designed to avoid the undesirable phenomenon known as latch-up, attributable to a parasitic element, and to enhance the density of integration. For this purpose a groove-like insulator layer is formed at a boundary between the well region and the semiconductor body to extend in the depthwise direction of the semiconductor body. This insulator layer separates the conductive regions that constitute the parasitic element. As a result, latch-up is avoided, the area of the well region can be made small and the density of integration can be made about 1.4 times higher than in a prior-art LSI.

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