Semiconductor device including a strained superlattice layer...

Details Semiconductor device including a strained superlattice layer... Semiconductor device including a strained superlattice layer...

H - Electricity

01

L

H01L 29/15 (2006.01) H01L 21/8234 (2006.01) H01L 29/10 (2006.01)

Patent

CA 2612118

A semiconductor device may include a stress layer (26') and a strained superlattice layer (425') above the stress layer and including a plurality of stacked groups of layers. More particularly, each group of layers of the strained superlattice layer may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.

La présente invention concerne un dispositif à semi-conducteur pouvant comprendre une couche de contrainte (26') recouverte d~une couche à hétérostructure contrainte (425') dotée d~une pluralité de groupes de couches superposés. Plus particulièrement, chaque groupe de couches de la couche à hétérostructure contrainte peut comporter une pluralité de monocouches semi-conductrices de base superposées définissant une section semi-conductrice de base, et au moins une monocouche non semi-conductrice contrainte au sein d~un réseau cristallin de sections semi-conductrices de base adjacentes.

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