Semiconductor device including band-engineered superlattice

Details Semiconductor device including band-engineered superlattice Semiconductor device including band-engineered superlattice

H - Electricity

01

L

H01L 29/15 (2006.01) H01L 29/10 (2006.01)

Patent

CA 2530067

A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.

L'invention concerne un dispositif à semiconducteur comprenant un super-réseau qui, à son tour, comprend plusieurs groupes empilés de couches. Ce dispositif comprend également des zones entraînant le transport de porteurs de charge à travers le super-réseau dans un sens parallèle par rapport aux groupes empilés de couches. Chaque groupe du super-réseau peut comprendre plusieurs monocouches semiconductrices de base, empilées, définissant une partie semiconductrice de base et une couche de modification de bande d'énergie disposée sur celle-ci. En outre, la couche de modification de bande d'énergie peut comprendre au moins une monocouche non semiconductrice confinée dans un réseau cristallin de parties semiconductrices de base adjacentes. Par conséquent, le super-réseau peut présenter une mobilité des porteurs de charge supérieure dans le sens parallèle par rapport à la technique antérieure.

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