Semiconductor device manufacturing method using under-etching

Details Semiconductor device manufacturing method using under-etching Semiconductor device manufacturing method using under-etching

H - Electricity

01

L

356/177

H01L 21/02 (2006.01) H01L 21/32 (2006.01) H01L 21/762 (2006.01)

Patent

CA 1209722

ABSTRACT: In a LOCOS process, depressions (11) are formed, which are filled afterwards by means of oxidation. Before- hand, the bottom (12) and the walls (13) of the depression (11) are coated with a double layer of oxide (14) and oxidation-resistant material (15). This double layer is removed from the bottom (12), which results in that along the walls (13) under the oxidation-resistant layer (15) cavities (18) are formed by under-etching, which facili- tate the supply of oxidants, as a result of which the re- maining parts (9) of the oxidation-resistant material are lifted as it were. Especially with oblique walls of the depression, a high accuracy to size of the active semiconductor regions (4) can then be obtained with res- pect to the original mask (10).

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