Semiconductor memory cell

G - Physics – 11 – C

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G11C 11/40 (2006.01) G11C 7/00 (2006.01) G11C 11/36 (2006.01) G11C 11/411 (2006.01)

Patent

CA 1220861

ABSTRACT A high density, low power dissipating semiconduc- tor memory cell is provided by connecting first and second inputs of a means for maintaining current in one of two conditions to first and second bit lines, by first and second diodes, respectively. Conveniently, the means for maintaining the current in one of two conditions includes first and second transistors operating in the nor- mal current mode. Standby current is provided to the base of the first transistor through the first bit line and first diode, and to the base of the second transistor through the second bit line and second diode.

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